Dr David Chisnall
Chisnall joined the CHERI project in 2012 to lead the languages and compiler strand of the research programme. He moved to Microsoft in 2018 where, among other things, he create and led the CHERIoT project. He is responsible for the original CHERI LLVM implementation and several key aspects of the CHERI and CHERIoT ISAs. He has been an LLVM committer since 2008.
Edoardo Marangoni
Marangoni is a compiler engineer and Rust programmer who has worked on several compiler projects at varying levels of the stack.
Jacob Pake
Jacob Pake is a Kent graduate. He built a compiler for Granule whose linear types enforce memory safety. He is currently a research intern working on compilers at Cambridge.
Prof. Mark Batty
Batty is an expert in formal specification of mainstream systems, focusing on concurrency and the C and C++ languages. He is a Professor at the University of Kent. He has been funded by the EPSRC, the Royal Academy of Engineering (RAEng), GCHQ, VeTSS, and is a Principal Investigator of two UKRI DSbD projects.
Michael Vollmer
Vollmer is a Lecturer at the University of Kent, previously working at Indiana University. His research focuses on type systems and compiler implementation, with the aim of closing the performance gap between safe, elegant, high-level code and hand-optimised, fragile, low-level code.
Owen Anderson
Anderson is the lead developer of CHERIoT LLVM. He has led compiler teams at several major tech companies and been an LLVM committer since 2006.
Dr. Paulo Torrens
Torrens is a researcher specialising in verified compilation. His past work includes gcc, tcc, and other compiler projects.
Sarah Harris
Harris has extensive experience with the Rust programming language, and with experimental systems programming. She has worked on the Atomic Weapons Establishment initiative to provide a trusted disassembler for AVR code, and on functional verification of the QEMU emulator for the AVR architecture. Her systems programming skills drive the changes needed to port the Rust compiler to the Morello architecture.